Intel Corporation is hiring Senior Post-Silicon Validation Engineer in Bangalore, Karnataka, India

Intel Corporation is hiring for the role of Senior Post-Silicon Validation Engineer in Bangalore, Karnataka, India. Interested candidates can apply for this recruitment drive and register through the given link. The detailed eligibility criteria to qualify and the application process are given below.

Job Summary of Intel Corporation:

Company Name: Intel Corporation

Job Profile: Senior Post-Silicon Validation Engineer

Location: Bangalore, Karnataka, India

Employment Type: Full-Time

Job Function: Quality Assurance

Job Description

Owns test plan/content development and responsible for delivering highest quality of coverage meeting the production quality expectations for the SoC. Uses and applies emulation and platform level tools and techniques to ensure functional quality and performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of complex failures. Requires broad understanding of multiple system areas and requires interfaces with SoC Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and design for validation capabilities. Will technically represent validation in various technical reviews and be accountable for quality of coverage.

Qualifications:

  • Candidate must possess bachelor’s/Master’s in Hardware Engineering or Electrical/Electronic Engineering or Computer Engineering or Computer Science with 8-12 years of experience
  • Candidate Must have high degree of Hardware architecture/ microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below
  • Should have strong knowledge and skills of Intel IA (IA32 architecture with uArch debug knowledge of Intel’s Core and Uncore or equivalent architecture.)
  • Candidate should have good programming skills in C/C++/Python Knowledge of ARM core validation is a value add
  • Candidate should have strong knowledge in one of the areas like Cache coherency, virtualization, system level Memory and Power Management
  • Hands on work in finding bugs in post silicon through fine tuned content in any of the domins listed above
  • You have good understanding of memory Controller / DDR (2/3/4) memory architecture and debug is a plus
  • Hands-On experience of complex SoC sightings and exposure to running cross-site TFs
  • You have knowledge on Debug Tools for JTAG, on chip trace features and ability to debug via OSC/LAs etc
  • Pre-silicon Design / Validation knowledge is a value add.
  • You have excellent written and oral communications and experience working in a cross functional team environment is essential.
  • You have good Team Player with the ability to work cross site and mentor a small team of engineers
  • You should have strong problem solving and analytical skills.

 

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